The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2018
Filed:
Jul. 04, 2017
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Rung-Yuan Lee, New Taipei, TW;
Yu-Cheng Tung, Kaoshiung, TW;
Chun-Tsen Lu, Tainan, TW;
En-Chiuan Liou, Tainan, TW;
Kuan-Hung Chen, Taichung, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/00 (2006.01); H01L 29/00 (2006.01); H01L 27/092 (2006.01); H01L 27/02 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/02636 (2013.01); H01L 21/823418 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 27/0207 (2013.01); H01L 29/0847 (2013.01); H01L 29/6653 (2013.01); H01L 29/7843 (2013.01);
Abstract
A semiconductor device and a method of forming the same, the semiconductor device includes a plural fin structures, two gates, a protection layer and an interlayer dielectric layer. The fin structures are disposed on a substrate. The two gates are disposed on the substrate across the fin structures. The protection layer is disposed on the substrate, surrounded sidewalls of the two gates. The interlayer dielectric layer is disposed on the substrate, covering the fin structures and the two gates.