The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2018
Filed:
Sep. 29, 2016
Cypress Semiconductor Corporation, San Jose, CA (US);
Shenqing Fang, Sunnyvale, CA (US);
Chun Chen, San Jose, CA (US);
Unsoon Kim, San Jose, CA (US);
Mark Ramsbey, Sunnyvale, CA (US);
Kuo Tung Chang, Saratoga, CA (US);
Sameer Haddad, San Jose, CA (US);
James Pak, Sunnyvale, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.