The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2018
Filed:
Nov. 10, 2016
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Yi-Da Tsai, Dongshi Township, Chiayi County, TW;
Cheng-Ping Lin, Hsinchu County, TW;
Wei-Hung Lin, Xinfeng Township, Hsinchu County, TW;
Chih-Wei Lin, Zhubei, TW;
Ming-Da Cheng, Zhubei, TW;
Ching-Hua Hsieh, Hsinchu, TW;
Chung-Shi Liu, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
Package structures and methods for forming the same are provided. A method for forming a package structure includes providing a carrier substrate. The method also includes forming a conductive layer over the carrier substrate. The method further includes forming a passivation layer over the conductive layer. The passivation layer includes openings that expose portions of the conductive layer. In addition, the method includes bonding integrated circuit dies to the portions of the conductive layer through bumps. There is a space between the integrated circuit dies and the passivation layer. The method also includes filling the space with a first molding compound. The first molding compound surrounds the bumps and the integrated circuit dies. The method further includes forming a second molding compound capping the first molding compound and the integrated circuit dies. The passivation layer has a sidewall that is covered by the second molding compound.