The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2018

Filed:

May. 05, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd, Hsin-Chu, TW;

Inventors:

Lung Chen, Hsinchu, TW;

Kang-Min Kuo, Zhubei, TW;

Wen-Hsin Chan, Zhubei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/165 (2006.01); H01L 29/161 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0847 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 29/7834 (2013.01); H01L 29/7848 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01);
Abstract

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate. The semiconductor device structure also includes a source/drain structure over the semiconductor substrate, and the source/drain structure includes a dopant. The semiconductor device structure further includes a channel region under the gate stack. In addition, the semiconductor device structure includes a semiconductor layer surrounding the source/drain structure. The semiconductor layer is configured to prevent the dopant from entering the channel region.


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