The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2018

Filed:

May. 13, 2013
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Benjamin Orr, Munich, DE;

Harald Gossner, Riemerling, DE;

Assignee:

INTEL IP CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); G01R 1/073 (2006.01); H05K 1/11 (2006.01); G01R 31/00 (2006.01); H05K 1/14 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
G01R 1/07378 (2013.01); G01R 31/002 (2013.01); H05K 1/11 (2013.01); H05K 1/0268 (2013.01); H05K 1/144 (2013.01); H05K 2201/09227 (2013.01); H05K 2201/10378 (2013.01);
Abstract

A board may include a first set of board contact pads arranged on a first side of the board, the pads configured to connect to circuit pads of a circuit under test, the positions of the pads matching to the positions of the circuit pads; a fan-out region on the first side of the board including fan-out contact pads configured to at least one of receive a test signal and provide a measurement signal; at least one contact pad connecting to at least one pad of the first set of board pads; and a second set of board contact pads on a second side of the board, the second set of board pads configured to connect to test board pads of a test board; positions of the pads matching to the positions of the test board pads; a pad connecting to a pad of the first set of board pads.


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