The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2018
Filed:
Jun. 21, 2017
Chipmos Technologies Inc., Hsinchu, TW;
Shih-Wen Chou, Hsinchu, TW;
ChipMOS Technologies Inc., Hsinchu, TW;
Abstract
A wafer level chip package manufacturing process is provided. A wafer includes a plurality of first chips and a circuit layer disposed on the first chips, wherein each of the first chips has a chip bonding region, a plurality of first inner pads located in the chip bonding region and a plurality of first outer pads located outside the chip bonding region, the circuit layer includes a plurality of insulating layers, the insulating layers have at least one groove, the groove is disposed between the first inner pads and the first outer pads, and the groove surrounds the first inner pads. A plurality of second chips are flipped on the chip bonding regions, so that second conductive bumps are located between and connected to the first inner pads and second pads of the second chips.