Young Soo Lee

Title: Young Soo Lee - Innovator in Chip Package Technology

Introduction

Young Soo Lee is a prominent inventor based in Santa Clara, CA. He has made significant contributions to the field of chip package technology. His innovative work has led to the development of a unique patent that enhances the functionality of integrated circuits.

Latest Patents

Young Soo Lee holds a patent for a "Coupled loop and void structure integrated in a redistribution layer of a chip package." This invention discloses a chip package and method for fabricating the same, which includes a redistribution layer (RDL) with a plurality of loop and void structures. The chip package comprises an integrated circuit (IC) die and a package substrate. The RDL is positioned between the IC die and the package substrate, featuring RDL circuitry that connects the IC die to the package substrate. The RDL circuitry includes a first coil formed in a first metal layer and a second coil formed in a second metal layer. A first end of the second coil is coupled to a second end of the first coil by a first via, while the second end of the second coil connects to the IC die. Young Soo Lee has 1 patent to his name.

Career Highlights

Young Soo Lee is currently employed at Xilinx, Inc., a leading company in the field of programmable logic devices. His work at Xilinx has allowed him to push the boundaries of chip package technology and contribute to advancements in the industry.

Collaborations

Throughout his career, Young Soo Lee has collaborated with talented individuals such as Po-Wei Chiu and Tzu-No Chen. These collaborations have fostered innovation and creativity in their projects.

Conclusion

Young Soo Lee is a notable inventor whose work in chip package technology has made a significant impact. His patent demonstrates his commitment to advancing the field and showcases his innovative spirit.