Hangzhou, China

Xiangyang Ma

This inventor holds 1 USPTO granted patent. Top assignee: Zhejiang University. Active years: 2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Xiangyang Ma. Retrieved from https://idiyas.com/inventor/xiangyang-ma-sikznebg

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Company Filing History:


Years Active: 2013

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1 patent (USPTO):Explore Patents

Title: Innovations of Xiangyang Ma in Silicon Wafer Technology

Introduction

Xiangyang Ma is a notable inventor based in Hangzhou, China. He has made significant contributions to the field of silicon wafer technology, particularly through his innovative patent related to internal gettering processes.

Latest Patents

Xiangyang Ma holds a patent titled "Process of internal gettering for Czochralski silicon wafer." This invention outlines a method that involves heating a Czochralski silicon wafer to temperatures between 1200-1250°C under a nitrogen atmosphere, followed by a cooling process. The method is designed to be more efficient than conventional processes, requiring lower temperatures and shorter time frames. The patent emphasizes the control of bulk microdefects and the denuded zone width through precise temperature and cooling rate management.

Career Highlights

Xiangyang Ma is affiliated with Zhejiang University, where he continues to engage in research and development in the field of materials science. His work has garnered attention for its practical applications in improving silicon wafer quality, which is crucial for various electronic devices.

Collaborations

Xiangyang Ma has collaborated with notable colleagues such as Ze Xu and Biao Wang. Their combined expertise contributes to advancing research in silicon wafer technology and related fields.

Conclusion

Xiangyang Ma's innovative work in the internal gettering process for Czochralski silicon wafers showcases his commitment to enhancing semiconductor technology. His contributions are vital for the ongoing development of high-quality silicon wafers used in electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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