Company Filing History:
Years Active: 2009
Title: William Buckner Davis: Innovator in Clock Domain Conflict Analysis
Introduction
William Buckner Davis is a notable inventor based in San Jose, CA. He has made significant contributions to the field of timing graph analysis, particularly in the area of clock domain conflict resolution. His innovative approach addresses complex issues in signal path management, enhancing the efficiency of electronic systems.
Latest Patents
Davis holds a patent for "Clock domain conflict analysis for timing graphs." This invention focuses on dissociating clock domains within a timing graph while maintaining the original relationships of the edges in the path. The method involves generating a timing graph that includes a source instance, a destination instance, and multiple edges that define various signal paths. By identifying conflicting clock domains associated with common edges, the invention allows for the dissociation of one clock domain from the conflicting edge, thereby improving the overall functionality of electronic designs.
Career Highlights
William Buckner Davis is currently employed at Altera Corporation, where he applies his expertise in timing analysis and electronic design automation. His work has been instrumental in advancing the company's technological capabilities and product offerings. With a focus on innovation, Davis continues to contribute to the field through his research and development efforts.
Collaborations
Davis has collaborated with notable colleagues, including Jason Govig and David Karchmer. These partnerships have fostered a collaborative environment that encourages the exchange of ideas and the development of cutting-edge solutions in the realm of electronic design.
Conclusion
William Buckner Davis is a distinguished inventor whose work in clock domain conflict analysis has made a significant impact on the field of electronic design. His innovative patent and contributions at Altera Corporation highlight his commitment to advancing technology and improving system performance.