Tuck Boon Chan

Title: Tuck Boon Chan: Innovator in Integrated Circuit Design

Introduction

Tuck Boon Chan is a notable inventor based in La Jolla, California. He has made significant contributions to the field of integrated circuit design, particularly in improving the reliability of interconnects. His innovative approach has led to advancements that benefit the semiconductor industry.

Latest Patents

Tuck Boon Chan holds a patent for an "IC layout adjustment method and tool for improving dielectric reliability at interconnects." This method involves selecting interconnects in an integrated circuit layout that are prone to dielectric breakdown. The process includes adjusting the layout to increase the spacing between vias and wires, thereby enhancing reliability. The selection process analyzes signal patterns and estimates stress ratios based on the state probability of routed signal nets. The resulting annotated layout provides specific distances for shifting wire or via segment edges, which can include thinning, shifting, and rotating components.

Career Highlights

Tuck Boon Chan is affiliated with the University of California, where he continues to engage in research and development in the field of integrated circuits. His work has been instrumental in addressing challenges related to dielectric reliability, which is crucial for the performance of modern electronic devices.

Collaborations

Tuck Boon Chan collaborates with Andrew B. Kahng, a fellow researcher in the field. Their partnership has fostered innovative solutions and advancements in integrated circuit technology.

Conclusion

Tuck Boon Chan's contributions to integrated circuit design exemplify the importance of innovation in technology. His patent and ongoing research efforts continue to influence the semiconductor industry positively.