Kawasaki, Japan

Takahisa Hiraide


Average Co-Inventor Count = 1.4

ph-index = 5

Forward Citations = 67(Granted Patents)


Location History:

  • Kawasaki, JP (1998 - 2012)
  • Yokohama, JP (2014)

Company Filing History:


Years Active: 1998-2014

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10 patents (USPTO):Explore Patents

Title: The Innovations of Takahisa Hiraide

Introduction

Takahisa Hiraide is a prominent inventor based in Kawasaki, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 10 patents. His work focuses on writing circuits and fault simulation methods, showcasing his expertise in integrated circuit design.

Latest Patents

Hiraide's latest patents include a writing circuit, semiconductor integrated circuit, and writing method. The writing circuit features storage to hold writing data intended for an OTP macro. It includes a controller that applies signals to execute writing and reading operations, along with a comparator to ensure data integrity. If the comparison indicates a match, the process concludes; otherwise, the signals are reapplied. Another notable patent is a method and apparatus for identifying paths with appropriate lengths for fault simulation. This apparatus extracts segments from multiple paths in a target circuit and judges candidate paths for fault simulation based on their lengths.

Career Highlights

Throughout his career, Hiraide has worked with notable companies such as Fujitsu Corporation and Fujitsu Microelectronics Limited. His experience in these organizations has allowed him to develop and refine his innovative ideas in semiconductor technology.

Collaborations

Hiraide has collaborated with talented individuals in the field, including Tatsuru Matsuo and Hitoshi Yamanaka. These partnerships have contributed to the advancement of his projects and patents.

Conclusion

Takahisa Hiraide's contributions to semiconductor technology and his innovative patents highlight his role as a leading inventor in the industry. His work continues to influence advancements in writing circuits and fault simulation methods.

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