Sudipta Paria

Title: Sudipta Paria: Innovator in Secure Digital Design Testing

Introduction

Sudipta Paria is a notable inventor based in Gainesville, Florida, recognized for his contributions to the field of secure digital design testing. With a focus on enhancing the security of scan chain-based design-for-testability structures, Paria has developed innovative solutions that address vulnerabilities in digital designs.

Latest Patents

Paria holds a patent for an "Invisible scan architecture for secure testing of digital designs." This patent presents various embodiments of a scan-based architecture that improves the security of register-transfer-level (RTL) or gate-level designs. The architecture features invisible scan chains that are concealed to prevent attackers from easily identifying or exploiting them. These chains are dynamically configurable, allowing for different scan paths across various designs, chips, or testing operations. Additionally, the invention employs key-based obfuscation, enhancing design security against unauthorized use and increasing confidentiality.

Career Highlights

Sudipta Paria is affiliated with the University of Florida Research Foundation, Incorporated, where he continues to advance research in secure digital design. His work has significant implications for the integrity and confidentiality of digital systems, making him a key figure in the field.

Collaborations

Paria has collaborated with notable colleagues, including Swarup Bhunia and Pravin Dasharth Gaikwad, contributing to the advancement of secure testing methodologies in digital design.

Conclusion

Sudipta Paria's innovative work in secure digital design testing exemplifies the importance of protecting sensitive information in technology. His contributions through patents and collaborations continue to shape the future of secure digital systems.