Steven Eplett

Title: The Innovative Contributions of Steven Eplett

Introduction

Steven Eplett is a notable inventor based in Milpitas, CA (US). He has made significant contributions to the field of integrated circuit design, particularly in the area of test methods for logic blocks. His work has implications for enhancing the reliability and efficiency of electronic devices.

Latest Patents

Eplett holds a patent for a "Transparent test method and scan flip-flop." This invention focuses on providing Design-for-Test-enabled flip-flops (DFT-enabled FFs) that ensure compliance with DFT rules associated with scan shifting. The test scan-chains are configured by daisy-chaining instances of the logic block in a transparent manner to user-designed application circuits. This allows for designs that do not require user-inserted test structures or considerations for DFT. The DFT-enabled FFs feature addressable control for partition testing and integral capture buffering, simplifying control logic and reducing the number of test vectors needed.

Career Highlights

Eplett's career is marked by his innovative approach to integrated circuit design. His work at Otrsotech, a Limited Liability Company, has allowed him to explore and develop advanced testing methodologies that enhance the functionality of electronic components. His patent reflects his commitment to improving design processes in the tech industry.

Collaborations

Throughout his career, Eplett has collaborated with talented individuals such as Pat Hom and Rabi Sengupta. These collaborations have contributed to the development of cutting-edge technologies in the field of integrated circuits.

Conclusion

Steven Eplett's contributions to the field of integrated circuit design through his innovative patent demonstrate his expertise and commitment to advancing technology. His work continues to influence the industry and improve the reliability of electronic devices.