San Jose, CA, United States of America

Shiying Xiong

This inventor holds 1 USPTO granted patent. Top assignee: Xilinx, Inc.. Active years: 2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shiying Xiong. Retrieved from https://idiyas.com/inventor/shiying-xiong

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2020

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1 patent (USPTO):Explore Patents

Title: Innovations by Shiying Xiong in Integrated Circuit Packaging

Introduction

Shiying Xiong is an accomplished inventor based in San Jose, California. He has made significant contributions to the field of integrated circuit packaging, particularly through his innovative techniques that enhance assembly efficiency.

Latest Patents

Shiying Xiong holds a patent for a high yield package assembly technique. This patent describes an integrated circuit (IC) chip package assembly apparatus and techniques for assembling IC chip packages. The process involves determining a first package assembly yield (PAY) across a first die pool and a second PAY across a second die pool, which includes a portion of the first plurality of dies. The final assembly sequence is generated by analyzing these PAYs to optimize the combination of dies for improved performance.

Career Highlights

Shiying Xiong is currently employed at Xilinx, Inc., a leading company in the field of programmable logic devices. His work focuses on developing advanced packaging techniques that contribute to the efficiency and reliability of integrated circuits.

Collaborations

Shiying collaborates with talented colleagues, including Thao H T Vo and Felino E Pagaduan, who contribute to the innovative environment at Xilinx, Inc.

Conclusion

Shiying Xiong's contributions to integrated circuit packaging through his patented techniques demonstrate his commitment to innovation in the technology sector. His work continues to influence the efficiency of IC assembly processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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