Dresden, Germany

Sören Jansen

This inventor holds 1 USPTO granted patent. Top assignee: Globalfoundries Inc.. Active years: 2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sören Jansen. Retrieved from https://idiyas.com/inventor/sören-jansen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2016

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1 patent (USPTO):Explore Patents

Title: The Innovative Contributions of Sören Jansen

Introduction

Sören Jansen is a notable inventor based in Dresden, Germany. He has made significant contributions to the field of integrated circuit fabrication. His work focuses on improving the methods used in the production of semiconductor devices.

Latest Patents

Sören Jansen holds a patent for "Methods for fabricating integrated circuits with isolation regions having uniform step heights." This patent outlines a method for fabricating integrated circuits that includes providing a semiconductor substrate with an isolation region between two device regions. The method involves selectively etching portions of the isolation region to achieve uniform step heights, thereby enhancing the efficiency and performance of integrated circuits.

Career Highlights

Jansen's career is marked by his innovative approach to semiconductor technology. His work at Globalfoundries Inc. has positioned him as a key player in the industry. He has demonstrated a commitment to advancing the methods used in integrated circuit fabrication, contributing to the overall progress in semiconductor technology.

Collaborations

Sören Jansen has collaborated with notable colleagues such as Carsten Grass and Martin Trentzsch. These collaborations have fostered an environment of innovation and have led to advancements in their respective fields.

Conclusion

Sören Jansen's contributions to the field of integrated circuits are noteworthy. His patent and collaborative efforts reflect his dedication to innovation in semiconductor technology. His work continues to influence the industry and pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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