This inventor holds 2 USPTO granted patents. Top assignee: Maxim Integrated Products, Inc.. Active years: 2012-2015.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2012-2015
Title: Rey Alvarado: Innovator in Wafer-Level Packaging Technology
Introduction
Rey Alvarado is a notable inventor based in San Jose, CA, who has made significant contributions to the field of wafer-level packaging (WLP) technology. With a total of 2 patents, Alvarado has focused on enhancing the performance and reliability of electronic devices through innovative packaging solutions.
Latest Patents
Alvarado's latest patents include advancements in WLP for superior temperature cycling, drop test, and high current applications. One of his patents describes a WLP device that features a flange-shaped under bump metallization (UBM) or an embedded partial solder ball UBM positioned atop a copper post-style circuit connection. This innovation aims to improve the durability and efficiency of electronic components under various stress conditions.
Career Highlights
Rey Alvarado is currently employed at Maxim Integrated Products, Inc., where he continues to develop cutting-edge technologies in the semiconductor industry. His work has been instrumental in pushing the boundaries of what is possible in electronic packaging.
Collaborations
Alvarado collaborates with talented professionals in his field, including Tie Wang and Arkadii V Samoilov, who contribute to the innovative environment at Maxim Integrated Products, Inc.
Conclusion
Rey Alvarado's contributions to wafer-level packaging technology exemplify the impact of innovation in the electronics industry. His patents reflect a commitment to enhancing device performance and reliability, making him a key figure in the field.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile