Company Filing History:
Years Active: 1990-1991
Title: The Innovations of Paul L. Peirson
Introduction
Paul L. Peirson is a notable inventor based in Forest Lake, MN (US). He has made significant contributions to the field of memory systems, holding two patents that showcase his innovative approach to technology. His work primarily focuses on enhancing the efficiency and reliability of memory operations.
Latest Patents
Peirson's latest patents include the "Pipelined Address Check Bit Stack Controller" and "Failure Detection for Partial Write Operations for Memories." The first patent describes a memory system that allows multiple requestors to read and write address bits efficiently. It utilizes a sequencer to control timing signals for reading, writing, and partial writing of data. This system generates check bits for both read and write addresses, ensuring accurate data transmission to an error detection circuit.
The second patent addresses a failure detection system for variable field partial write operations. It allows for the merging of data bits in a memory word based on programmable requests. The system defines the start and end of the bit field to be written, ensuring that data integrity is maintained during the merge operation.
Career Highlights
Paul L. Peirson is currently employed at Unisys Corporation, where he continues to develop innovative solutions in memory technology. His work has significantly impacted the efficiency of data handling in various applications.
Collaborations
Throughout his career, Peirson has collaborated with notable colleagues, including James H. Scheuneman and Michael E. Mayer. These collaborations have further enriched his contributions to the field of memory systems.
Conclusion
Paul L. Peirson's innovative patents and career at Unisys Corporation highlight his significant role in advancing memory technology. His work continues to influence the efficiency and reliability of data operations in modern computing systems.