Patrick Guo Oiang Lo

Title: Patrick Guo Oiang Lo: Innovator in Semiconductor Technology

Introduction

Patrick Guo Oiang Lo is a notable inventor based in Singapore, recognized for his contributions to semiconductor technology. He has developed innovative methods that enhance the performance of CMOS devices, showcasing his expertise in the field.

Latest Patents

Patrick holds a patent for a method of fabricating tensile strained layers and compressive strain layers for a CMOS device. This process involves forming both tensile and compressive strained silicon layers to optimize channel regions of MOSFET or CMOS devices. The fabrication begins with the formation of shallow trench isolation structures, followed by high-temperature oxidation and activation procedures. A semiconductor alloy layer is deposited, and an oxidation procedure is employed to segregate a germanium component from the overlying semiconductor alloy layer into an underlying single crystalline silicon body. The level of germanium segregated determines the strain level in the subsequently grown silicon layer. This innovative approach allows for different strain states and levels in the silicon-germanium layer, depending on the germanium concentration in the underlying portions.

Career Highlights

Patrick is affiliated with the Agency for Science, Technology and Research, where he continues to push the boundaries of semiconductor research. His work has significant implications for the development of advanced electronic devices.

Collaborations

He collaborates with esteemed colleagues, including Lakshmi Kanta Bera and Wei Yip Loh, contributing to a dynamic research environment that fosters innovation.

Conclusion

Patrick Guo Oiang Lo's work in semiconductor technology exemplifies the impact of innovative thinking in the field. His patented methods for fabricating strained silicon layers are paving the way for advancements in CMOS devices.