Hwaseong, South Korea

Myeongwoo Lee

This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2023-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Myeongwoo Lee. Retrieved from https://idiyas.com/inventor/myeongwoo-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 3.6

ph-index = 1


Company Filing History:


Years Active: 2023-2026

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3 patents (USPTO):Explore Patents

Title: Myeongwoo Lee - Innovator in Nonvolatile Memory Testing

Introduction

Myeongwoo Lee is an inventor based in Suwon-si, South Korea. He has made significant contributions to the field of nonvolatile memory devices. His innovative approach focuses on methods of testing these devices, which are crucial for modern electronics.

Latest Patent Applications

Myeongwoo Lee's notable patent application is titled "METHODS OF TESTING NONVOLATILE MEMORY DEVICES AND NONVOLATILE MEMORY DEVICES." This application outlines a method for testing nonvolatile memory devices that includes a first semiconductor layer and a second semiconductor layer formed prior to the first. The method involves providing circuit elements, including a page buffer circuit and at least one driver, in the second semiconductor layer. It describes how to mimic the on-state of nonvolatile memory cells that are not connected to the page buffer circuit by establishing at least one discharging path between a sensing node and a plurality of discharge transistors of the driver. The application details a sensing and latching operation performed in the page buffer circuit to determine whether it operates normally based on the results of this operation.

Conclusion

Myeongwoo Lee's work in the field of nonvolatile memory testing showcases his innovative spirit and dedication to advancing technology. His contributions, particularly through his patent application, highlight the importance of effective testing methods in the development of reliable memory devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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