IDiyas

For the Inventor, By the Inventor

Tokyo, Japan

Mototaka Kuribayashi

USPTO Granted Patents = 5

Average Co-Inventor Count = 1.7

ph-index = 4

Forward Citations = 78(Granted Patents)


Location History:

  • Kawasaki, JP (1991)
  • Kanagawa-ken, JP (1996 - 1999)
  • Tokyo, JP (2001 - 2002)

Company Filing History:

goldMedal5 out of 52,711 
 
Kabushiki Kaisha Toshiba
 patents

Years Active: 1991-2002

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5 patents (USPTO):Explore Patents
1. 6374205 - Method of reducing circuit data, method of simulating circuit, and medium for storing circuit data reduction program (2002-04-16),
2. 6223333 - Pattern matching method, timing analysis method and timing analysis device (2001-04-24),
3. 5966521 - System and method for analyzing static timing (1999-10-12),
4. 5583788 - Automatic layout design method of wirings in integrated circuit using (1996-12-10),
5. 5012427 - Semiconductor integrated circuit and method of manufacturing the same (1991-04-30),
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