Kejia Zhu

Title: Kejia Zhu - Innovator in Instruction Scheduling for Reconfigurable Array Processors

Introduction

Kejia Zhu is a notable inventor based in Beijing, China. He has made significant contributions to the field of computer engineering, particularly in the area of instruction scheduling for reconfigurable array processors. His innovative approach has the potential to enhance the efficiency and performance of processing units.

Latest Patents

Kejia Zhu holds a patent for an "Instruction scheduling method and system for reconfigurable array processor." This patent describes a method that includes determining whether a fan-out of a vertex in a data flow graph (DFG) is less than the actual interconnection number of a processing unit in a reconfigurable array. The method establishes a corresponding relationship between the vertex and a correlation operator of the processing unit. It introduces a register to a directed edge, acquires a retiming value of each vertex, and arranges instructions so that retiming values of the instruction vertexes are in ascending order. The process also involves acquiring transmission time and scheduling order of the instructions, folding the DFG, placing an instruction to an instruction vertex, inserting a register, and acquiring a current DFG. Finally, it utilizes a maximum clique algorithm to acquire a common maximum subset of the current DFG and the reconfigurable array, distributing the instructions accordingly.

Career Highlights

Kejia Zhu is currently employed at Beijing Tsing