Underhill, VT, United States of America

Jeannie Therese Harrigan Panner


Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 10(Granted Patents)


Company Filing History:


Years Active: 2001

Loading Chart...
1 patent (USPTO):

Title: Jeannie Therese Harrigan Panner: Innovator in Semiconductor Technology

Introduction

Jeannie Therese Harrigan Panner is a notable inventor based in Underhill, Vermont. She has made significant contributions to the field of semiconductor technology, particularly with her innovative wiring techniques that address critical issues in integrated circuit design.

Latest Patents

Jeannie holds a patent for a semiconductor wiring technique aimed at reducing electromigration. This invention involves an integrated circuit chip that features at least one source pin and multiple sink pins. A wire segment connects the source pin to one or more sink pins, incorporating at least two segments where one segment is larger than the other, specifically designed to mitigate the effects of electromigration.

Career Highlights

Jeannie is currently employed at International Business Machines Corporation, commonly known as IBM. Her work at IBM has allowed her to be at the forefront of technological advancements in semiconductor design and manufacturing.

Collaborations

Throughout her career, Jeannie has collaborated with esteemed colleagues such as David James Hathaway and Douglas Wayne Kemerer. These partnerships have contributed to her success and the development of innovative solutions in her field.

Conclusion

Jeannie Therese Harrigan Panner is a pioneering inventor whose work in semiconductor technology has made a lasting impact. Her dedication to innovation continues to inspire future advancements in the industry.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…