Coimbatore, India

Dharaneedharan S


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2015

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1 patent (USPTO):Explore Patents

Title: The Innovations of Dharaneedharan S

Introduction

Dharaneedharan S is a notable inventor based in Coimbatore, India. He has made significant contributions to the field of semiconductor memory technology. His innovative approach has led to the development of a unique patent that enhances the functionality of memory cells.

Latest Patents

Dharaneedharan S holds a patent for "Context protection for a column interleaved memory." This invention involves a semiconductor memory cell that includes a set of circuit structures, each having column input/output circuits. Additionally, the semiconductor memory cell features a set of replicas corresponding to the column input/output circuits. These replicas are non-functional and fill an empty space next to the column input/output circuits, thereby providing context protection for the column input/output circuits.

Career Highlights

Dharaneedharan S is currently employed at Texas Instruments Corporation, a leading company in the semiconductor industry. His work at Texas Instruments has allowed him to apply his innovative ideas in a practical setting, contributing to advancements in memory technology.

Collaborations

Some of his notable coworkers include Lakshmikantha V Holla and Thomas J Aton. Their collaboration has likely fostered an environment of innovation and creativity within the team.

Conclusion

Dharaneedharan S is a prominent inventor whose work in semiconductor memory technology has made a significant impact. His patent for context protection in memory cells showcases his innovative thinking and dedication to advancing technology.

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