Kanagawa, Japan

Chie Ishida

This inventor holds 5 USPTO granted patents and 10 published patent applications and 2 EPO patents. Top assignees: Panasonic Intellectual Property Corporation of America, Panasonic Corporation, Panasonic Intellectual Property Management Co., Ltd.. Active years: 2014-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chie Ishida. Retrieved from https://idiyas.com/inventor/chie-ishida

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5 

% Patents Active = 100.0

 

Average Co-Inventor Count = 2.2

ph-index = 1

Forward Citations = 7(Granted Patents)


Location History:

  • Kanagawa, JP (2014 - 2016)
  • Osaka, JP (2016)

Company Filing History:


Years Active: 2014-2016

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5 patents (USPTO):Explore Patents

Title: Chie Ishida - Innovator in Semiconductor Polishing Technology

Introduction

Chie Ishida is an inventor based in Chigasaki-shi, Japan. He has made significant contributions to the field of semiconductor polishing technology. His innovative approach focuses on developing a polishing compound that enhances the efficiency and effectiveness of semiconductor manufacturing processes.

Latest Patent Applications

Chie Ishida has filed a patent application for a "SEMICONDUCTOR POLISHING COMPOUND, PROCESS FOR ITS PRODUCTION AND POLISHING METHOD." This application describes a semiconductor polishing compound that comprises cerium oxide abrasive grains, water, and a water-soluble organic polymer additive. The additive can be ammonium polyacrylate or an anionic surfactant. The compound is designed to have a pH of 3.5 to 6 at 25° C. and a concentration of the additive ranging from 0.01 to 0.5% based on the total mass of the polishing compound. This innovative polishing compound offers dispersion stability, excellent scratch characteristics, and superior polishing planarization characteristics. Notably, it reduces dishing fluctuation when polishing semiconductor substrates with silicon nitride and silicon oxide films. Additionally, it shortens the time required for polishing pattern wafers.

Conclusion

Chie Ishida's work in developing advanced semiconductor polishing compounds showcases his commitment to innovation in the semiconductor industry. His contributions are poised to enhance manufacturing processes and improve product quality.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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