San Jose, CA, United States of America

Bryan Von Lossberg


Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 50(Granted Patents)


Company Filing History:


Years Active: 2001-2003

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2 patents (USPTO):Explore Patents

Title: Innovations by Bryan Von Lossberg

Introduction

Bryan Von Lossberg is an accomplished inventor based in San Jose, CA. He has made significant contributions to the field of wafer processing technology, holding a total of 2 patents. His work focuses on enhancing the efficiency and effectiveness of wafer handling systems.

Latest Patents

Bryan's latest patents include a hydraulically actuated wafer clamp and a wafer aligner in the center of the front end frame of a vacuum system. The hydraulically actuated wafer clamp is designed to retain wafers on a surface with minimal clamping force, utilizing fluid pressure to operate various embodiments, including a piston and cylinder mechanism, a bellows arrangement, and a bladder arrangement. This innovative clamping mechanism ensures that wafers are securely held while minimizing damage and maximizing efficiency. The wafer aligner patent addresses the need for precise alignment of wafers as they move through a vacuum processing system, reducing unnecessary movements and optimizing the overall footprint of the system.

Career Highlights

Bryan is currently employed at Applied Materials, Inc., a leading company in the semiconductor industry. His work at Applied Materials has allowed him to develop and refine technologies that are crucial for modern wafer processing.

Collaborations

Throughout his career, Bryan has collaborated with notable colleagues, including Robert L. Otwell and Eric Anton Nering. These collaborations have contributed to the advancement of innovative solutions in wafer handling and processing.

Conclusion

Bryan Von Lossberg's contributions to wafer processing technology through his patents and work at Applied Materials, Inc. highlight his role as a significant inventor in the field. His innovations continue to impact the efficiency of semiconductor manufacturing processes.

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