Location History:
- Poulsbo, WA (US) (2008 - 2015)
- Costa Mesa, CA (US) (2009 - 2016)
Company Filing History:
Years Active: 2008-2016
Title: Innovations by Bruce Gregory Warren
Introduction
Bruce Gregory Warren is a notable inventor based in Costa Mesa, California. He holds a total of 17 patents, showcasing his significant contributions to technology and innovation. His work primarily focuses on improving device reliability and memory validation.
Latest Patents
One of his latest patents is a methodology for manipulation of SATA device access cycles. This invention involves controlling accesses to target devices, such as disk drives, by modifying their duty cycle profile to enhance reliability. The utilization of a target device is monitored, and if it is being overused, a rest period is reserved for it. This approach not only increases the reliability of the device but also adds a delay to the processing of commands, creating pressure on system administrators to manage the number of commands sent to the device. Another significant patent is related to the generation of simulated errors for high-level system validation. This invention includes a device and integrated circuit that can read an original data value from memory and virtualize an error to generate a modified data value. This technology is particularly useful for high-level memory validation.
Career Highlights
Bruce has worked with prominent companies in the tech industry, including Emulex Design & Manufacturing Corporation and Emulex Corporation. His experience in these organizations has contributed to his expertise and innovative capabilities.
Collaborations
Some of his notable coworkers include Carl Joseph Mies and William Patrick Goodwin. Their collaboration has likely fostered an environment of creativity and innovation.
Conclusion
Bruce Gregory Warren's contributions to technology through his patents and collaborations highlight his role as a significant inventor in the field. His work continues to influence advancements in device reliability and memory validation.