Brian Snider

Title: Brian Snider - Innovator in Memory Array Testing

Introduction

Brian Snider is a notable inventor based in Round Rock, TX (US). He has made significant contributions to the field of memory technology, particularly in the testing of redundant circuitry within memory arrays. His innovative approach has led to the development of a unique method that enhances the efficiency of wafer testing.

Latest Patents

Brian Snider holds 1 patent for his invention titled "Method and apparatus for wafer test of redundant circuitry." This patent describes a method and apparatus designed to test redundant circuitry within a memory array. The invention features a control unit that interfaces a memory array to a wafer tester, allowing for the selective enabling of redundant rows and columns during the wafer test. This process does not require permanent alterations to the row and column select switches, thus preserving the integrity of the memory array. The temporary enabling of these redundant components facilitates testing prior to any permanent switch logic alterations.

Career Highlights

Brian Snider is currently employed at Integrated Device Technology, Inc., where he continues to innovate in the field of memory technology. His work has been instrumental in advancing the methods used for testing memory arrays, ensuring higher reliability and performance in memory devices.

Collaborations

Brian collaborates with his coworker, Daniel G Miner, who shares a commitment to advancing technology in their field. Their combined expertise contributes to the innovative environment at Integrated Device Technology, Inc.

Conclusion

Brian Snider's contributions to the field of memory technology through his innovative patent demonstrate his commitment to enhancing the efficiency of memory testing. His work continues to influence the industry positively.