The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2019

Filed:

Jan. 21, 2016
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventor:

Katsuhiko Hoya, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2005.12); G11C 13/00 (2005.12); G11C 11/16 (2005.12);
U.S. Cl.
CPC ...
G11C 7/1006 (2012.12); G11C 11/16 (2012.12); G11C 13/00 (2012.12);
Abstract

A semiconductor storage device includes plural bit lines and plural word lines. The memory cell array has plural memory cells that are connected with the bit lines and word lines, and can store data. Plural sense amplifiers detect the data stored in the memory cells. Plural write drivers write data in the memory cells. A comparison buffer temporarily stores the write data to be written in the memory cells by the write driver. In a series of write sequences, the comparison buffer stores the read data from the memory cells selected as the write object and the write data to be written in the selected memory cells. After a series of write sequences, when the pre-charge command for resetting the voltage of the bit lines is received, the write execution command is executed so that the comparison buffer executes write in the selected memory cells.


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