The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2008
Filed:
Oct. 18, 2001
Nghia Tran, Milpitas, CA (US);
Ying Xuan LI, Cupertino, CA (US);
Janusz Balicki, San Jose, CA (US);
John Costello, Los Altos, CA (US);
Nghia Tran, Milpitas, CA (US);
Ying Xuan Li, Cupertino, CA (US);
Janusz Balicki, San Jose, CA (US);
John Costello, Los Altos, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A programmable input/output device for use with a programmable logic device (PLD) is presented comprising an input buffer, an output buffer and programmable elements. The programmable elements may be programmed to select a logic standard for the input/output device to operate at. For instance, a given set of Select Bits applied to the programmable elements may select TTL logic, in which case the input and output buffers would operate according to the voltage levels appropriate for TTL logic (e.g., 0.4 volts to 2.4 volts). For a different set of Select Bits, the GTL logic standard would be applied (e.g., 0.8 volts to 1.2 volts). The invention enables a single PLD to be used in conjunction with various types of external circuitry.