The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2018
Filed:
Sep. 27, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Kevin Gotze, Hillsboro, OR (US);
Gregory Iovino, Portland, OR (US);
David Johnston, Beaverton, OR (US);
Patrick Koeberl, Alsbach-Haenlein, DE;
Jiangtao Li, Beaverton, OR (US);
Wei Wu, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/34 (2006.01); H04L 9/08 (2006.01); H04L 9/32 (2006.01); G09C 1/00 (2006.01);
U.S. Cl.
CPC ...
H04L 9/34 (2013.01); G09C 1/00 (2013.01); H04L 9/0866 (2013.01); H04L 9/3278 (2013.01); H04L 2209/12 (2013.01);
Abstract
Embodiments of an invention for using dark bits to reduce physically unclonable function (PUF) error rates are disclosed. In one embodiment, an integrated circuit includes a PUF cell array and dark bit logic. The PUF cell array is to provide a raw PUF value. The dark bit logic is to select PUF cells to mark as dark bits and to generate a dark bit mask based on repeated testing of the PUF cell array.