The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2018
Filed:
Apr. 01, 2016
Intel Corporation, Santa Clara, CA (US);
Anthony S. Bock, Vancouver, WA (US);
Michael J. Greger, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
In accordance with embodiments disclosed herein, there is provided systems and methods for time offset validation of components with independent silicon clocks. A requesting component includes transmission logic to transmit timing protocol requests to a responding component, receiving logic to receive timing protocol responses, replay detection logic to detect a retransmission of a timing protocol message and to set an internal timing state of the requesting component as invalid, and validation logic to detect at least two consecutive timing protocol dialogs and set the internal timing state of the requesting component as valid. A responding component includes receiving logic, transmission logic, replay detection logic to detect a retransmission of a timing protocol message and set an internal timing state of the responding component as invalid, and validation logic to detect at least two consecutive timing protocol dialogs and set the internal timing state of the responding component as valid.