The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 2018

Filed:

Jan. 17, 2017
Applicant:

Seagate Technology Llc, Cupertino, CA (US);

Inventors:

AbdelHakim S. Alhussien, San Jose, CA (US);

Erich F. Haratsch, San Jose, CA (US);

Earl T. Cohen, Oakland, CA (US);

Yunxiang Wu, Cupertino, CA (US);

Assignee:

SEAGATE TECHNOLOGY LLC, Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01); H03M 13/45 (2006.01); G11C 7/10 (2006.01); G11C 11/56 (2006.01); G11C 16/10 (2006.01); G11C 27/00 (2006.01); H03M 13/25 (2006.01); H03M 13/29 (2006.01); G11C 16/26 (2006.01); G06F 11/32 (2006.01); H03M 13/11 (2006.01); H03M 13/15 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); G06F 11/079 (2013.01); G06F 11/0727 (2013.01); G06F 11/0751 (2013.01); G06F 11/1068 (2013.01); G11C 7/1006 (2013.01); G11C 11/5628 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 27/005 (2013.01); G11C 29/52 (2013.01); H03M 13/256 (2013.01); H03M 13/2906 (2013.01); H03M 13/45 (2013.01); H03M 13/458 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0679 (2013.01); H03M 13/1102 (2013.01); H03M 13/152 (2013.01);
Abstract

An apparatus includes an interface and a control circuit. The interface may be configured to process read/write operations to/from a memory. The control circuit may be configured to create dependencies between a current bit in a sequence of data bits and neighboring bits in the sequence of data bits to generate mapped bits in response to a condition in a region of the memory being true, write the mapped bits among at least two memory cells in the region of the memory with at least two of the mapped bits stored in each of the memory cells, where the dependencies mitigate a hard error due to one of the at least two cells being stuck in a fixed state, and write the sequence of data bits in the region of the memory in response to the condition in the region of the memory being false.


Find Patent Forward Citations

Alhussien, AbdelHakim. (2018). Write mapping to mitigate hard errors via soft-decision decoding (U.S. Patent No. 9990247). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9990247

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…