The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2018
Filed:
Jul. 18, 2017
Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;
Francois Andrieu, Saint Ismier, FR;
Abstract
An integrated circuit comprising: first to third nMOS transistors with different threshold voltages, and first to third pMOS transistors with different threshold voltages, the nMOS transistors having channel regions made of silicon subjected to tensile stress and/or said pMOS transistors having channel regions made of SiGe subjected to compressive stress; a first well and a second well that are arranged underneath the nMOS transistors and underneath the pMOS transistors, respectively, with one and the same doping; two nMOS gate stacks comprising one and the same material, two of the nMOS gate stacks comprising materials having separate work functions, an nMOS gate stack having one and the same material as a pMOS gate stack, with the equation: Gp*Vdds−Gn*Gnds=Sn*|σn|+Sp*(|σp|−1.65*10)−VarCais+K.