The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2018

Filed:

Aug. 07, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Mark Allen Gerber, Lucas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/4952 (2013.01); H01L 21/4825 (2013.01); H01L 23/49548 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/85 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48472 (2013.01); H01L 2224/48639 (2013.01); H01L 2224/48839 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/85439 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/181 (2013.01); H01L 2924/1815 (2013.01);
Abstract

A semiconductor device () comprising a leadframe () having an assembly pad () in a first horizontal plane (), the pad's first surface () with a semiconductor chip () attached; further a plurality of leads () in a parallel second horizontal plane () offset from the first plane in the direction of the attached chip, the leads having a third surface () with bonding wires, and an opposite fourth surface (); a package () encapsulating leadframe, chip, and wires, the package having a fifth surface () parallel to the first and second planes; a plurality of recess holes () in the package, each hole stretching from the fifth surface to the fourth surface of respective leads; and solder () filling the recess holes, the solder attached to the fourth lead surface and extending to the fifth package surface.


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