The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2018
Filed:
Dec. 27, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Debendra Das Sharma, Saratoga, CA (US);
Mohan J. Kumar, Aloha, OR (US);
Balint Fleischer, Groton, MA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0644 (2013.01); G06F 3/061 (2013.01); G06F 3/0607 (2013.01); G06F 3/067 (2013.01); G06F 3/0631 (2013.01); G06F 3/0679 (2013.01); G06F 9/5016 (2013.01); G06F 2209/5011 (2013.01);
Abstract
An apparatus for pooling memory resources across multiple nodes is described herein. The apparatus includes a shared memory controller, wherein each node of the multiple nodes is connected to the shared memory controller. The apparatus also includes a pool of memory connected to the shared memory controller, wherein a portion of the pool of memory is allocated to each node of the multiple nodes.