The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2018

Filed:

Oct. 20, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Veeresh V. Deshpande, Zurich, CH;

Howard S. Landis, Essex Junction, VT (US);

Arun Sankar Mampazhy, Kerala, IN;

Neelima Mandloi, East Fishkill, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G03F 1/36 (2012.01); G03F 7/20 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G03F 1/36 (2013.01); G03F 7/70441 (2013.01); G06F 17/5081 (2013.01);
Abstract

Various embodiments include approaches for modifying a design layer of an integrated circuit (IC). In some cases, an approach includes: identifying at least one empty region in a design layer used to form the IC; determining whether the at least one empty region requires a fill object; placing at least one fill object in the at least one empty region and tagging the at least one fill object in response to determining the at least one empty region requires a fill object; performing a simplified optical proximity correction (OPC) on the tagged at least one fill object and a complete OPC on the design layer; and generating a modified design layer including a corrected version of the design layer and modified fill objects after the performing of the simplified OPC on the tagged at least one fill object and the complete OPC on the design layer.


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