The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2018
Filed:
Feb. 13, 2015
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Sunghae Lee, Suwon-si, KR;
Daehong Eom, Hwaseong-si, KR;
JinGyun Kim, Yongin-si, KR;
Daehyun Jang, Seongnam-si, KR;
Kihyun Hwang, Seongnam-si, KR;
Seongsoo Lee, Seongnam-si, KR;
Kyunghyun Kim, Seoul, KR;
Chadong Yeo, Suwon-si, KR;
Jun-Youl Yang, Seoul, KR;
Se-Ho Cha, Goyang-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-do, KR;
Abstract
Three dimensional semiconductor memory devices and methods of fabricating the same are provided. According to the method, sacrificial layers and insulating layers are alternately and repeatedly stacked on a substrate, and a cutting region penetrating an uppermost sacrificial layer of the sacrificial layers is formed. The cutting region is filled with a non sacrificial layer. The insulating layers and the sacrificial layers are patterned to form a mold pattern. The mold pattern includes insulating patterns, sacrificial patterns, and the non sacrificial layer in the cutting region. The sacrificial patterns may be replaced with electrodes. The related semiconductor memory device is also provided.