The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2018

Filed:

Aug. 22, 2017
Applicant:

Inston Inc., Los Angeles, CA (US);

Inventors:

Albert Lee, Los Angeles, CA (US);

Hochul Lee, Los Angeles, CA (US);

Kang-Lung Wang, Los Angeles, CA (US);

Assignee:

INSTON INC., Los Angeles, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); G11C 16/34 (2006.01); G11C 7/10 (2006.01); G11C 7/08 (2006.01); G11C 16/28 (2006.01); G11C 29/12 (2006.01); G11C 29/02 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 7/08 (2013.01); G11C 7/1006 (2013.01); G11C 7/1045 (2013.01); G11C 16/28 (2013.01); G11C 29/028 (2013.01); G11C 29/1201 (2013.01); G11C 2029/1202 (2013.01);
Abstract

The present disclosure provides a calibration method for a nonvolatile memory device having a plurality of unit cells, each of the unit cells corresponding to a word line and a bit line of the nonvolatile memory device. The calibration method includes: calibrating a word signal pulse of each of the word lines with a first calibration value corresponding to the word line; calibrating a bit signal pulse of each of the bit lines with a second calibration value corresponding to the bit line; and calibrating each of the unit cells according to the word line and the bit line corresponding to the unit cell.


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