The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2018

Filed:

Oct. 06, 2014
Applicant:

The-aio Co., Ltd., Gyeonggi-do, KR;

Inventors:

Seung-Hyun Han, Seoul, KR;

Sun-Mo Hwang, Gyeonggi-do, KR;

Assignee:

The-AiO Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G11C 11/56 (2006.01); G06F 11/10 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 29/02 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5642 (2013.01); G06F 11/1044 (2013.01); G06F 11/1048 (2013.01); G06F 11/1068 (2013.01); G11C 11/5628 (2013.01); G11C 16/26 (2013.01); G11C 16/3404 (2013.01); G11C 29/021 (2013.01); G11C 29/028 (2013.01);
Abstract

A non-volatile memory device according to example embodiments includes at least one NAND flash memory and a memory controller configured to control the NAND flash memory. The memory controller comprises a bit counter configured to count a number of first binary digit of each of first to N-th readout page data, the first to N-th readout page data being respectively read by first to N-th test read voltages, a register configured to store first to N-th count values with respect to the first to N-th readout page data output from the bit counter, and a read voltage adjuster configured to compare the first to N-th count values to determine a read voltage, where N is an integer greater than 1.


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