The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2018
Filed:
Nov. 21, 2016
Applicant:
Nxp Usa, Inc., Austin, TX (US);
Inventors:
Assignee:
NXP USA, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 13/16 (2006.01); G11C 16/10 (2006.01); G11C 16/16 (2006.01); G11C 16/28 (2006.01); G11C 16/34 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 13/1678 (2013.01); G06F 13/1694 (2013.01); G11C 16/10 (2013.01); G11C 16/16 (2013.01); G11C 16/28 (2013.01); G11C 16/3495 (2013.01); G06F 3/0619 (2013.01);
Abstract
A system for reducing stress on a memory device that has multiple memory blocks. The system includes a counting unit for incrementing count values respectively associated with the memory blocks. Each of the count values indicates the number of times the associated memory block has been erased. A controller monitors the count values. Upon detecting that a count value associated with a first memory block reaches a predefined threshold, the controller selects a second memory block from the memory blocks to be swapped with the first memory block based on a count value associated with the second memory block.