The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2018

Filed:

Jul. 31, 2014
Applicant:

Winbond Electronics Corporation, Taichung, TW;

Inventor:

Oron Michael, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 12/08 (2016.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1072 (2013.01); G06F 11/1048 (2013.01); G06F 11/1064 (2013.01); G06F 12/08 (2013.01); G11C 2029/0411 (2013.01);
Abstract

The NAND flash memory array in a memory device may be programmed using a cache program execute technique for fast performance. The memory device includes a page buffer, which may be implemented as a cache register and a data register. Program data may be loaded to the cache register, where it may be processed by an error correction code ('ECC') circuit. Thereafter, the ECC processed data in the cache register may be replicated to the data register and used to program the NAND flash memory array. Advantageously, immediately after the ECC processed data in the cache register is replicated to the data register, the cache register may be made available for other operations. Of particular benefit is that a second page of program data may be loaded into the cache register and ECC processed while the first page of program data is being programmed into the NAND flash memory array.


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