The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2018
Filed:
Dec. 23, 2015
Intel Corporation, Santa Clara, CA (US);
Devadatta Bodas, Federal Way, WA (US);
Meenakshi Arunachalam, Portland, OR (US);
Ilya Sharapov, San Jose, CA (US);
Charles R. Yount, Phoenix, AZ (US);
Scott B. Huck, Portland, OR (US);
Ramakrishna Huggahalli, Costa Mesa, CA (US);
Justin J. Song, Olympia, WA (US);
Brian J. Griffith, Auburn, WA (US);
Muralidhar Rajappa, Chandler, AZ (US);
Lingdan (Linda) Zeng, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method of assessing energy efficiency of a High-performance computing (HPC) system, including: selecting a plurality of HPC workloads to run on a system under test (SUT) with one or more power constraints, wherein the SUT includes a plurality of HPC nodes in the HPC system, executing the plurality of HPC workloads on the SUT, and generating a benchmark metric for the SUT based on a baseline configuration for each selected HPC workload and a plurality of measured performance per power values for each executed workload at each selected power constraint is shown.