The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Dec. 10, 2015
Applicant:

AT & S Austria Technologie & Systemtechnik Aktiengesellschaft, Leoben, AT;

Inventors:

Andreas Zluc, Leoben, AT;

Gerald Weidinger, Leoben, AT;

Mario Schober, Trofaiach, AT;

Hannes Stahr, St. Lorenzen im Mürztal, AT;

Timo Schwarz, St. Michael i.O., AT;

Benjamin Gruber, Niklasdorf, AT;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H05K 1/00 (2006.01); B32B 15/08 (2006.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H05K 3/46 (2006.01); H05K 3/00 (2006.01); H01L 21/48 (2006.01); H01L 23/14 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0271 (2013.01); H01L 21/481 (2013.01); H01L 21/4857 (2013.01); H01L 23/145 (2013.01); H01L 23/5383 (2013.01); H01L 23/5387 (2013.01); H01L 23/5389 (2013.01); H01L 24/20 (2013.01); H05K 1/0366 (2013.01); H05K 1/0373 (2013.01); H05K 1/0393 (2013.01); H05K 1/115 (2013.01); H05K 1/185 (2013.01); H05K 1/189 (2013.01); H05K 3/0017 (2013.01); H05K 3/0097 (2013.01); H05K 3/4602 (2013.01); H05K 2201/0129 (2013.01); H05K 2201/0133 (2013.01); H05K 2201/0191 (2013.01); H05K 2201/068 (2013.01); H05K 2201/09136 (2013.01);
Abstract

A circuit board is described which includes a layer composite with at least one dielectric layer which includes a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto, and which includes a layer thickness along a z-axis which is perpendicular with respect to the x-axis and to the y-axis; and at least one metallic layer which is attached to the dielectric layer in a planar manner. The layer composite along the z-axis is free from a symmetry plane which is oriented in parallel with respect to the xy-plane, and the dielectric layer includes a dielectric material which has an elastic modulus E in a range between 1 and 20 GPa and along the x-axis and along the y-axis a coefficient of thermal expansion in a range between 0 and 17 ppm/K. A method of manufacturing such a circuit board is also described. Further, a method of manufacturing a circuit board structure comprising two asymmetric circuit boards and a method of manufacturing two processed asymmetric circuit boards from a larger circuit board structure is described.


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