The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Jul. 25, 2017
Applicant:

Alpha and Omega Semiconductor (Cayman) Ltd., Sunnyvale, CA (US);

Inventors:

Yan Xun Xue, Los Gatos, CA (US);

Zhiqiang Niu, Santa Clara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49562 (2013.01); H01L 21/4853 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/3121 (2013.01); H01L 23/49555 (2013.01); H01L 23/49575 (2013.01); H01L 24/90 (2013.01);
Abstract

A semiconductor power device is disclosed. The semiconductor power device comprises a lead frame unit, two or more pluralities of single in-line leads, two or more semiconductor chip stacks, and a molding encapsulation. Each semiconductor chip stack includes a high-side semiconductor chip, a low-side semiconductor chip and a clip connecting a top surface of the high-side semiconductor chip to a bottom surface of the low-side semiconductor chip. This invention further discloses a method for fabricating semiconductor power devices. The method comprises the steps of providing a lead frame strip having a plurality of lead frame units; providing two or more pluralities of single in-line leads; attaching two or more high-side semiconductor chips to each lead frame unit; connecting each of the two or more high-side semiconductor chips to a respective lead by a respective clip of two or more first clips; attaching a respective low-side semiconductor chip of the two or more low-side semiconductor chips to each clip of the two or more first clips; molding an encapsulation; and singulating the lead frame strip and the encapsulation to form the semiconductor power devices.


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