The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Aug. 11, 2014
Applicant:

Sumitomo Electric Industries, Ltd., Osaka-shi, JP;

Inventors:

So Tanaka, Osaka, JP;

Kyoko Okita, Itami, JP;

Taro Nishiguchi, Itami, JP;

Ryosuke Kubota, Osaka, JP;

Kenji Kanbara, Osaka, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
C30B 25/18 (2006.01); C30B 33/00 (2006.01); C30B 29/36 (2006.01); H01L 29/04 (2006.01); H01L 29/16 (2006.01); H01L 21/02 (2006.01); C30B 23/00 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02021 (2013.01); C30B 25/186 (2013.01); C30B 29/36 (2013.01); C30B 33/00 (2013.01); H01L 21/02378 (2013.01); H01L 21/02433 (2013.01); H01L 29/045 (2013.01); H01L 29/1608 (2013.01); C30B 23/00 (2013.01); H01L 21/02529 (2013.01); H01L 29/0657 (2013.01);
Abstract

A silicon carbide semiconductor substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of not more than 700 μm. A dislocation density is not more than 500/mmat an arbitrary region having an area of 1 mmin a region within 5 mm from an outer circumferential end portion of the first main surface toward a center of the first main surface. Accordingly, there is provided a silicon carbide semiconductor substrate allowing for suppression of generation of cracks.


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