The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2018

Filed:

Jul. 20, 2016
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Anil Singh Rawat, Delhi, IN;

Pritender Singh, Noida, IN;

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01); G11C 17/12 (2006.01); G11C 17/10 (2006.01); G11C 17/18 (2006.01); G06F 17/50 (2006.01); H01L 27/112 (2006.01);
U.S. Cl.
CPC ...
G11C 17/12 (2013.01); G06F 17/5045 (2013.01); G11C 17/10 (2013.01); G11C 17/123 (2013.01); G11C 17/126 (2013.01); G11C 17/18 (2013.01); H01L 27/11213 (2013.01);
Abstract

A method to program bitcells of a ROM array uses different programming cells for programming the bitcells with a first or second data item. A first bitcell is programmed by means of a selected programming cell, wherein the programming cell is selected in dependence on operating the memory array as a flipped or a non-flipped memory in multi-bank instance. All other bitcells located in the same column as the first bitcell and subsequent rows are programmed by selected programming cells, wherein the selection of the programming cells is dependent on operating the memory array as a flipped or a non-flipped memory in multi-bank instance and the programming state of the programming cells used for the previously programmed bitcells in the same column.


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