The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2018
Filed:
Jun. 16, 2016
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Hiroaki Niimi, Dallas, TX (US);
Manoj Mehrotra, Bangalore, IN;
Mahalingam Nandakumar, Richardson, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/02 (2006.01); H01L 21/027 (2006.01); H01L 21/28 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 21/321 (2006.01); H01L 21/3213 (2006.01); H01L 21/8238 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 21/0234 (2013.01); H01L 21/0271 (2013.01); H01L 21/0273 (2013.01); H01L 21/02148 (2013.01); H01L 21/02164 (2013.01); H01L 21/02178 (2013.01); H01L 21/02181 (2013.01); H01L 21/02186 (2013.01); H01L 21/02189 (2013.01); H01L 21/02332 (2013.01); H01L 21/28079 (2013.01); H01L 21/28088 (2013.01); H01L 21/28158 (2013.01); H01L 21/31053 (2013.01); H01L 21/31055 (2013.01); H01L 21/31111 (2013.01); H01L 21/3212 (2013.01); H01L 21/32133 (2013.01); H01L 21/823828 (2013.01); H01L 21/823842 (2013.01); H01L 21/823857 (2013.01); H01L 27/0922 (2013.01); H01L 29/42364 (2013.01); H01L 29/42372 (2013.01); H01L 29/495 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01); H01L 29/66545 (2013.01); H01L 21/28202 (2013.01); H01L 21/28238 (2013.01); H01L 29/513 (2013.01);
Abstract
An integrated circuit and method with a metal gate NMOS transistor with a high-k first gate dielectric on a high quality thermally grown interface dielectric and with a metal gate PMOS transistor with a high-k last gate dielectric on a chemically grown interface dielectric.