The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Apr. 06, 2017
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventor:

Hidenori Fujii, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/102 (2006.01); H01L 27/06 (2006.01); H01L 29/739 (2006.01); H01L 29/861 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 21/324 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0664 (2013.01); H01L 21/26513 (2013.01); H01L 21/324 (2013.01); H01L 29/6609 (2013.01); H01L 29/66333 (2013.01); H01L 29/7395 (2013.01); H01L 29/861 (2013.01);
Abstract

A semiconductor device includes a multilayer structure including an n− i layer, a p anode layer formed on the front surface of the n− i layer, an n− buffer layer formed on the back surface of the n− i layer, an n+ cathode layer and a p collector layer formed on the back surface of the n− buffer layer or on the back surfaces of the n− i layer and the n− buffer layer such that the n+ cathode layer and the p collector layer are adjacent to each other in a plan view or adjacent portions thereof overlap each other in a plan view, a front surface electrode, and a back surface electrode. A vertical position in the multilayer structure of the n+ cathode layer in the multilayer structure differs from that of the p collector layer.


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