The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2018
Filed:
Jul. 20, 2015
Intel Corporation, Santa Clara, CA (US);
Binata Bhattacharyya, Portland, OR (US);
Raghunandan Makaram, Northborough, MA (US);
Amy L. Santoni, Scottsdale, AZ (US);
George Z. Chrysos, Portland, OR (US);
Simon P. Johnson, Beaverton, OR (US);
Brian S. Morris, Santa Clara, CA (US);
Francis X. McKeen, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A processor implementing techniques for supporting configurable security levels for memory address ranges is disclosed. In one embodiment, the processor includes a processing core a memory controller, operatively coupled to the processing core, to access data in an off-chip memory and a memory encryption engine (MEE) operatively coupled to the memory controller. The MEE is to responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with the off-chip memory, identify a security level indicator associated with the memory location based on a value stored on a security range register. The MEE is further to access at least a portion of a data item associated with the memory address range of the off-chip memory in view of the security level indicator.