The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2018
Filed:
Mar. 10, 2015
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventor:
Syed Z. Islam, Chandler, AZ (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/14 (2006.01); G01R 31/28 (2006.01); G06F 13/40 (2006.01); G06F 11/22 (2006.01); G06F 11/27 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4068 (2013.01); G06F 11/2236 (2013.01); G06F 11/27 (2013.01); G06F 13/4221 (2013.01);
Abstract
Methods and apparatus relating to observing an internal link via an existing port for System On Chip (SOC) devices are described. In one embodiment, a logic within an SOC device may allow an external logic analyzer to observe communication between a first and second component of the SOC through an existing (e.g., shared and/or non-dedicated) interface. Other embodiments are also disclosed.
Islam, Syed. (2018). Observing an internal link via an existing port for system on chip devices (U.S. Patent No. 9959236). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9959236
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile